1. Field of the Invention
The invention relates to a method of determining the conditions of a reflow furnace in which a semiconductor element is mounted on a substrate and, more particularly, to a method of preventing the displacing of melting of solder bumps.
2. Description of the Related Art
FIG. 11 shows an outline of the reflow furnace for heating solder so as to mount the semiconductor element on the substrate. Terminals of packaging parts referred to as BGA or CSP, or of the semiconductor element 1 comprising bare chips are, as shown, formed with solder bumps 2, as shown in FIG. 12(a), and positioned and mounted onto a substrate 3 The substrate 3 is placed in a mounting jig 4 made by carbon and conveyed onto a conveyor belt. For securing connection with the solder bumps 2, the semiconductor element 1 is loaded with a weight 5 of several milligrams for each bump 2 to be mashed when the solder bumps 2 are melted. Thus, the substrate 3 and the semiconductor element 1 are moved by the conveyor belt into the reflow furnace 6, and heated by a heat of a gas within the reflow furnace 6. The heat thereby is transferred to the solder bumps 2, the solder bumps 2 are melted, and the semiconductor element 1 and the substrate 3 are connected. The temperature in the reflow furnace 6 is set to different temperatures in , e.g., six zones, as shown in the figure. The temperature is set to rise from the entrance side of the reflow furnace toward the inside, and is then set to drop at the exit portion. The zone at the entrance side, called the xe2x80x9cpreheating zonexe2x80x9d, is constructed such that even if mounting parts are different, a solder for mounting a plurality of mounting parts having the semiconductor element 1 in a lump has a uniform temperature. The following zone is called the xe2x80x9creflow zonexe2x80x9d, and is set at a temperature at which the solder can be melted. Assuming that these six zones are R1, R2, R3, R4, R5, and R6, respectively, the temperature relationship thereof is set as R1 less than R6 less than R2 less than R3=R5 less than R4. If the solder bumps have high concentration of Pb, since the melting point is around 310xc2x0 C., R1 is set around 300xc2x0 C., which is a temperature just under the melting temperature, R2 is set around 400xc2x0 C., and R6 is set around 350xc2x0 C., which is a temperature after the melting.
Although the temperature is thus set such that the solder is melted appropriately, there are some cases of which shortage phenomena occur at the connecting portion of the solder bumps. Taking statistics of such phenomena for each of the solder bumps of one semiconductor element, it is found that more shortages occurred around the solder bumps at the forward side of the advancing direction within a reflow furnace. That is, as shown in FIGS. 12(a)-12(b), a semiconductor element 1 mounted via solder bumps 2 on a substrate 3 housed in a mounting jig 4 is moved to the right as shown in FIG. 12(a). Then, as shown in FIG. 12(b), the semiconductor element 1 is mounted at a position lower than a regular mounting position 1. Further, at this time the mashed amount of the solder bumps is greater at the right side of the figure, which is the forward side of the advancing direction.
To analyze the phenomena in greater detail, the temperature history of the interior of the furnace was acquired and the temperature was analyzed using ABAQUS (product name), which is a general purpose analysis program of a finite element method of Hibbitt, Karlsson and Sorensen Inc., US. It was found that when the analysis was carried out, the temperature histories were different, in terms of time, between the solder bumps in the forward side and the solder bumps in the backward side of the advancing direction in the reflow furnace among the solder bumps to be provided on the same semiconductor element 1.
It is assumed that when the solder bumps reach the melting temperature, the mashed amount of the solder bump increases, and the sinking amount of the semiconductor element becomes larger as time progresses. If this condition occurs excessively, it is assumed that the solder bumps spread laterally, the adjacent solder bumps are fused together, and then the shorting phenomena occur.
The invention is directed toward removing the failure of connections caused by which the meshed amounts of the plurality, of solder bumps for connecting the semiconductor element to the substrate are different within a single semiconductor element.
The present invention is directed toward enabling optimal temperature control by analyzing, when setting the conditions of the reflow furnace, both of the temperature histories of the front and back solder bumps of the advancing direction in the reflow furnace among the solder bumps of a single semiconductor element to be mounted.
The first embodiment of the method of the invention is a method of mounting a semiconductor element in which the semiconductor element is mounted on a substrate via solder bumps, in which a mounting of the semiconductor element is carried out while moving the substrate into a reflow furnace, and in which the heat conductivity profile of the reflow furnace is set through temperature analysis. Temperature analysis is carried out to obtain temperatures in a forward side and in a rearward side of said movement of the solder bumps securing said semiconductor element. The temperature analysis step analyzes and alters the temperature gradient from the circumference of said semiconductor element to the center of the semiconductor element. From the analyzed results, the thermal conductive coefficient which is either the difference between the times of which the temperatures of the solder bumps at the forward and rearward sides exceeds the melting temperature of the solder is small, or the difference between the times of which the temperature of the solder bumps at the forward and rearward sides reaches the melting temperature of the solder is small, is obtained, and the temperature of the solder bumps is controlled by setting the heat conductivity profile within the reflow furnace based on the obtained thermal conductive coefficient.
A heat conductivity profile in the reflow furnace, with a convection mechanism which causes convection in a gas within the reflow furnace, is set by controlling the flow rate of the convection.
The heat conductivity in the reflow furnace is set high at a preheating area which is an area ahead of which the solder bumps are melted, and is set lower than that of the preheating area at a reflow area which is an area in which the solder bumps are melted.
A second embodiment of the method of the present invention is directed to the mounting of a semiconductor element, in which the semiconductor element is mounted on a substrate via solder bumps, in which a mounting of the semiconductor element is carried out while moving the substrate into a reflow furnace, and in which a jig is selected through temperature analysis, temperature control method of a solder bump in the reflow furnace, characterized by providing a step of the temperature analysis for obtaining, by temperature analysis, temperatures in a forward side and a rearward side of the moving of the solder bump securing the semiconductor element. The temperature analysis step analyzes and alters the shape and data of characteristic value of the jig, and obtains, from the analyzed results, a jig which is either the difference between the times of which the temperatures of the solder bumps at the forward and backward sides exceeds the melting temperature of the solder is small, or the difference between the times of which the temperature of the solder bumps at the forward and backward sides reaches the melting temperature of the solder is small, and controls, using the obtained jig, temperature of the solder bump in the reflow furnace.
The jig is a weight to be mounted on the semiconductor element, and a time difference is reduced by altering the heat capacity of the weight.
The jig is a weight to be mounted on the semiconductor element, and the weight is fin shaped to alter the surface area of the weight and to allow the change of the temperature gradient, and that the difference in time is reduced by altering the weight.
The jig is a receipt jig which houses the substrate, and the difference in time is reduced by altering the heat capacity of the receipt jig.
The jig comprises a receipt jig housing the substrate, and a cover which covers the substrate, and the cover has an opening at the part for the weight to be mounted on the semiconductor element.
By this method, at the forward and rearward sides of the solder bumps connecting the substrate and the semiconductor element which move within the reflow furnace, the difference between times of which the solder bumps reaches the melting temperature is reduced, the mashed amounts of the plural solder bumps within the-single element may be made almost equal. A reflow furnace for mounting a semiconductor element while the semiconductor element is mounted on a substrate via solder bumps, and while moving the substrate into a reflow furnace, is characterized in that the reflow furnace of the present invention is set different temperatures in multiple areas, and is provided with convection mechanisms for causing a different convection for each area.
By the above structure, at the solder bumps in the front and back of the semiconductor element secured by the reflow furnace, controlling width of reducing the difference between times of which the solder bumps reaches the melting temperature, is broadened and the productivity of the substrate is enhanced.